Retromaster’s Electronics Projects

…related to old computers and other assorted stuff…

Posts Tagged ‘Clock recovery’

Back in Action with Cumulus!

Posted by retromaster on July 28, 2011

After a few months of absence due to some personal issues, I am glad to announce that for now, everything seems to be back on track :). Now a status update on Cumulus.

Some of the close followers of the Cumulus project may already be aware that, during testing some months ago, some Oric machines failed to boot properly with Cumulus. Lately, I’ve had the chance to work on this issue. It turns out that, due to the notoriously poor clock signal of the Orics (almost sawtooth instead of square!), the bus timings were off with the machines that failed. I have managed to get the failing machines to boot, but there are still timing issues, especially with the MAP signal, as one can observe video corruption from time to time.

I am still working on a solution to this problem… One possible solution is to increase the 32Mhz clock on the Cumulus to 64Mhz. This would enable more accurate sampling of the incoming clock signal and therefor improve MAP signal timing. I do not have any 64Mhz clock oscillators handy though, so I’ll have to order them. I am also not ruling out the possibility that there may be some other signal integrity issue at play here. More tests will probably point this out.

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Dual Drive Support in UFE

Posted by retromaster on May 20, 2010

Here is a screenshot of XCopy just after copying a floppy with UFE in dual drive mode. I think this was the second floppy for the game “Arabian Nights”. After copying this, I mounted the first floppy in DF0, rebooted the Amiga, and I was able to play the game without having to swap floppies (since the second floppy was already in DF1 after the copy operation). I need to modify the UFE user interface to have a suitable, practical way to mount floppies in each drive and make them write-protected if desired. 

During my tests, I’ve found out that the write clock recovery circuit I am using (based on the 555 timer) can be somewhat sensitive (probably to temperature) to the pot adjustment that controls the clock frequency. This issue manifests itself in the form of data corruption during writes. Reads are not affected on the Amiga as it is quite tolerant to changes in bitrate, a “feature” used by many protection schemes back in the day. Once the clock frequency is adjusted, writes work fine, independent of the disk image. I intend to address this sensitivity issue in the next board revision.

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Floppy Write Clock Recovery

Posted by retromaster on April 14, 2010

To implement write support for the floppy emulator, the write clock must somehow be recovered from the write data input. The simplest (and probably least robust) way of doing this is in software. When the write enable line becomes active, a “change notice” interrupt on the write data input can be used to detect the first negative-going edge. When triggered, this interrupt would initiate the first SPI receive operation with the proper timing. The rest of the SPI receives would follow, and hopefully there would be little or no jitter on the data (since this is coming from the host). This assumes of course that the host sends data with a perfect 2us interval, which may or may not be the case.

With a little bit of additional circuitry, it is possible to implement more robust clock recovery, which is what I’ve been experimenting with the last few days. I’ve come across a simple circuit based on the 555 timer (CMOS version) used in the Amiga Floppy Reader project. The 555 timer is used to generate the 500khz write data clock, but the write data line is connected to the reset input of the 555 IC. is synchronizes the clock output to the negative-going edges of the write data signal, effectively recovering the clock from the data.

The tiny little board in the photos shows my test implementation of this clock recovery circuit. Early on during my first tests, I realized that there is a minimum width to the reset pulse. This causes the clock pulse to be late. It almost overlaps the positive-going edge of the data signal. Therefore I added a second 555 to delay and enlarge the low pulses of the data signal. That did not work as well as I expected, as the delay introduced by the 555 turned out to be a little too large, as the oscilloscope shot shows.

Another idea that I experimented seems to perform better. Instead of using a 555 for delaying the data signal, a 74hc14 is used to buffer the signal and an RC low pass filter is used to introduce a phase shift. Obviously, a 555 takes up less board space than a 74hc14 and that is why I was experimenting with two 555s instead. A small advantage of the 74hc14 circuit is that there is no need to invert the incoming signal on the MCU side.

As it should be evident from this post, I am already working on a completely new design that will use a PIC32 and on-board memory to fully implement read and write emulation. This is actually a cross between the TFE+ and UFE that I mentioned in one of my previous posts. That is why the test PCB I’ve made uses SMD parts and has a red soldermask, as it was a little exercise for manufacturing the new design.

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