Retromaster’s Electronics Projects

…related to old computers and other assorted stuff…

Cumulus Progress

Posted by retromaster on November 11, 2010

Here is the Atmos with the Cumulus board displaying the “insert system disc” message running the original Microdisc ROM.

Getting to this stage took a fair bit of debugging. First, I had to further tweak the MAP signal timing to make sure that all RAM accesses (including the hidden upper 16k) worked fine. Then I needed to solve a couple of problems with the CPLD code (minor changes, but critical for operation, nevertheless).

At this point, the LA shows that the CPU is stuck in an infinite loop, waiting for an IRQ, right after the first command having been issued to the WD1793. This is perfectly normal, as the floppy controller emulation code (on the PIC side) is not in place yet. That is the first item that I will be addressing in the upcoming days.

On a side note, I have also solved the instability and video flicker issues I mentioned in a previous post. It turned out to be due to the original Atmos power adapter not being able to provide enough juice to power both the Atmos and Cumulus, causing the 5V line to oscillate. Switching to an adapter with a higher current rating (1A at 9V DC) solved the problem. So, apparently, Cumulus will not require a separate power supply connection, but a single, more powerful supply will be required to power both from the Atmos DC power jack.

The debugging process here on this project also gave me the idea to design and build a specialized logic analyzer for projects such as this one. It would be very wide (perhaps up to 48 or 64 channels), but not very fast. It would be intended for the expansion connectors on retro computers, perhaps in a pass-through fashion, by means of custom-made adapters. A SDRAM module could be used for deep storage and a small MCU for USB communication with a PC host. A small FPGA would handle the capture operations and provide and coordinate access to SDRAM storage. Presence of an FPGA would also make triggering very flexible.

4 Responses to “Cumulus Progress”

  1. Torlus said

    Hi,
    That’s funny, as I’m working on something similar😉
    I did some years ago a Oric-in-a -FPGA project, that I recently enhanced to include the Microdisc support. The Microdisc design is splitted in two parts : one part is connected to the remaining parts of the Oric, and the other part is a large finite state machine emulating the WD1793 (it currents reads disks images from a Flash memory). Both parts communicate using a 12-wire interface (2 control + 4 data, in both directions, but the number of wires required could easily be trimmed down) as I planned to do the same thing as you : use a CPLD (I planned to use an ATF 1508), and a PIC that would do SD-card handling and WD1793 emulation.
    I can provide you what I’ve done so far, if it can be of any help (I don’t see the point of having 2 different projects for this purpose, especially when yours seems more advanced than mine), I’m thiking about the minimal WD1793 emulation (currently in VHDL).
    I’ll try also to make a video of the project running off my Altera DE1 board, for you to see.
    Regards,
    Greg

  2. retromaster said

    Hi. I think I’ve seen your Oric-on-FPGA project (on your blog, most likely), but of course I did not know that you made improvements recently. That’s good to hear.

    At the moment I am working on getting the interface between the CPLD and the PIC to work. It’s proving to be somewhat tricky, as the Oric Bus (CPLD) and the PIC are working on different clocks. And it’s a bit harder to debug these things on the real hardware (as opposed to an FPGA, for example). I hope to get some first results soon.

    And I appreciate your offer, although I think it would not be of much specific help right now… Thanks, anyway.
    -RM

  3. Torlus said

    Well, the design I’ve done uses REQ/ACK handshaking mechanism, especially to cope with different clocks. It also performs some kind on register caching on the Oric side (setting immediately the Busy flag when required for instance).

    For a logic analyzer, I’ve been quie satisfied with the SUMP Logic Analyzer (I already had the Spartan-3 Starter Board, which helped).

  4. retromaster said

    The SUMP LA is nice. I do already have a DSO with a 16-channel LA attachment but 16+2 channels are hardly enough🙂 It can also be hassle to setup sometimes (with all the leads flying around). That’s why I thought it would be nice to have a 48 to 64 channel LA with perhaps as much as 64Mbyte storage. It would make life much easier… Anyway, it’s just an idea for yet another project.

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