A2601 Page Up!
Posted by retromaster on September 8, 2010
I’ve finished the first version of the A2601 project. I’ve created a new page giving details on the project, including several photos, screenshots, videos and schematics. Complete VHDL sources are released under GPL (including a novel 6502 core).
A really mindboggling issue that I needed to solve during last week was corruption of the FPGA configuration bitstream when the on-board Xilinx Configuration PROM is programmed with a design. Naturally, the A2601 board is setup so that the Configuration PROM will automatically configure the FPGA on powerup. However, it seems that, after this, if one tries to re-configure the FPGA using the JTAG interface, the configuration bitstream will become corrupt (in fact, Xilinx Impact will report a verification failure). Apparently, the only way to overcome this problem is to keep the Configuration PROM blank during development, and only program it with the final design when it is ready.
Ironically, I had already encountered this problem a few years ago when I was first working on the A2601 design. I had identified the problem then and worked around it. Too bad I forgot all about it and had to spend a few days figuring out the same things all over this time again…
I also worked a bit on adding PAL video output support to A2601. I did obtain some color images but nothing proper yet. The major hurdle here is that I am trying to obtain PAL signals using a NTSC crystal, frequency multiplied by 16. It should be possible in theory, but there is something obviously missing, still.